Revision history of "Asynchronous logic diagrams: Methods and software tools for designing in a reconfigurable environment" (Q3056330)

12 March 2024

• curprev 14:1714:17, 12 March 2024‎ DG Regio talk contribs‎ 135,240 bytes +288‎ ‎Added qualifier: readability score (P590521): 0.2738445516483834

12 June 2023

• curprev 09:0809:08, 12 June 2023‎ Admin talk contribs‎ 134,952 bytes +437‎ BatchIngestion

3 August 2022

• curprev 20:0320:03, 3 August 2022‎ DG Regio talk contribs‎ 134,515 bytes +90,189‎ ‎Changed label, description and/or aliases in et, lt, hr, el, sk, fi, pl, hu, cs, ga, sl, bg, mt, pt, da, ro, sv, nl, fr, de, it, lv, es, and other parts: Adding translations: et, lt, hr, el, sk, fi, pl, hu, cs, ga, sl, bg, mt, pt, da, ro, sv,

12 January 2022

• curprev 17:3717:37, 12 January 2022‎ DG Regio talk contribs‎ 44,326 bytes +5,365‎ ‎Changed label, description and/or aliases in es, and other parts: Adding Spanish translations

11 January 2022

• curprev 10:0810:08, 11 January 2022‎ DG Regio talk contribs‎ 38,961 bytes +5,364‎ ‎Changed label, description and/or aliases in it, and other parts: Adding Italian translations

28 November 2021

• curprev 18:0118:01, 28 November 2021‎ DG Regio talk contribs‎ 33,597 bytes +5,220‎ ‎Created claim: summary (P836): 1.1.1. Korte beschrijving van de samenvatting van het project.Het doel van het project is het ontwikkelen van theorie en het evalueren van de methodologie, stap-voor-stap procedure en tools voor het ontwerpen van asynchrone circuits in een herconfigureerbare omgeving.Asynchrone apparatuur trekt toenemende belangstelling, aangezien asynchrone circuits zeer stabiel zijn. Dit betekent dat het ontwerp zich kan aanpassen aan verschillende parameters...
• curprev 18:0118:01, 28 November 2021‎ DG Regio talk contribs‎ 28,377 bytes +167‎ ‎Changed label, description and/or aliases in nl: translated_label
• curprev 09:2609:26, 28 November 2021‎ DG Regio talk contribs‎ 28,210 bytes +5,223‎ ‎Created claim: summary (P836): 1.1.1. Kurze Beschreibung der Projektzusammenfassung.Das Ziel des Projekts ist es, Theorie zu entwickeln und die Methodik, Schritt-für-Schritt-Verfahren und Werkzeuge für die Gestaltung von asynchronen Schaltungen in einer rekonfigurierbaren Umgebung zu bewerten.Asynchrone Ausrüstung zieht wachsendes Interesse an, da asynchrone Schaltungen sehr stabil sind. Dies bedeutet, dass das Design in der Lage ist, sich an verschiedene Parameter des Produk...
• curprev 09:2609:26, 28 November 2021‎ DG Regio talk contribs‎ 22,987 bytes +165‎ ‎Changed label, description and/or aliases in de: translated_label

25 November 2021

• curprev 19:3319:33, 25 November 2021‎ DG Regio talk contribs‎ 22,822 bytes +5,495‎ ‎Created claim: summary (P836): 1.1.1. Brève description du résumé du projet.L’objectif du projet est de développer la théorie et d’évaluer la méthodologie, la procédure étape par étape et les outils de conception de circuits asynchrones dans un environnement reconfigurable.Les équipements asynchrones attirent de plus en plus d’intérêt, car les circuits asynchrones sont très stables. Cela signifie que la conception est capable de s’adapter aux différents paramètres du processu...
• curprev 19:3319:33, 25 November 2021‎ DG Regio talk contribs‎ 17,327 bytes +176‎ ‎Changed label, description and/or aliases in fr: translated_label

27 September 2021

• curprev 11:5111:51, 27 September 2021‎ DG Regio talk contribs‎ 17,151 bytes +420‎ ‎Changed an Item: modifying co-finance rate with the percentage
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10 September 2021

• curprev 14:0114:01, 10 September 2021‎ DG Regio talk contribs‎ 17,151 bytes +420‎ ‎Changed an Item

15 July 2021

• curprev 12:3312:33, 15 July 2021‎ DG Regio talk contribs‎ 16,731 bytes +161‎ ‎Changed label, description and/or aliases in en: translated_label
• curprev 12:3312:33, 15 July 2021‎ DG Regio talk contribs‎ 16,570 bytes +4,580‎ ‎Created claim: summary (P836): 1.1.1. Short description of the project summary The aim of the project is to develop theory and evaluate methodology, phase procedures and tools for designing asynchronous circuits in a reconfigurable environment. Asynchronous equipment attracts increasing interest, because asynchronous circuits are very stable. This means that design can adapt to different parameters of the production process, delays in logic elements and wires, temperature cha...

14 July 2021

• curprev 07:0307:03, 14 July 2021‎ DG Regio talk contribs‎ 11,990 bytes +431‎ ‎Changed an Item: Edited by the beneficiary bot - attach the beneficiary based on the string

13 July 2021

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• curprev 09:5909:59, 13 July 2021‎ DG Regio talk contribs‎ 10,619 bytes +9,847‎ ‎Changed an Item: import item from Latvia
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• curprev 09:0909:09, 13 July 2021‎ DG Regio talk contribs‎ 10,619 bytes +4‎ ‎Changed label, description and/or aliases in en: Setting new description
• curprev 09:0909:09, 13 July 2021‎ DG Regio talk contribs‎ 10,615 bytes +10,615‎ ‎Created a new Item: import item from Latvia