HARDWARE AND SOFTWARE SOLUTIONS FOR HIGH PERFORMANCE COMPUTING (Q3187457): Difference between revisions
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(Removed claim: summary (P836): THIS PROJECT ADDRESSES SOME OF THE CHALLENGES POSED BY HIGH PERFORMANCE ARCHITECTURES (MULTINUCLEO, MANYCORE, GPU AND CLOUD COMPUTING). THESE ARCHITECTURES WILL BE OF COMMON USE IN THE MEDIUM TERM, BECAUSE IT IS THE ONLY WAY TO CONTINUE TO INCREASE PERFORMANCE WITHOUT EXCESSIVELY COMPROMISING POWER CONSUMPTION. HOWEVER, THERE ARE MANY CHALLENGES THAT ARE CURRENTLY FACING. WE PROPOSE TO ADDRESS SOME OF THEM AT SYSTEM SOFTWARE, APPLICATION SOFTW...) |
(Created claim: summary (P836): THIS PROJECT ADDRESSES SOME OF THE CHALLENGES POSED BY HIGH PERFORMANCE ARCHITECTURES (MULTINUCLEO, MANYCORE, GPU AND CLOUD COMPUTING). THESE ARCHITECTURES WILL BE OF COMMON USE IN THE MEDIUM TERM, BECAUSE IT IS THE ONLY WAY TO CONTINUE TO INCREASE PERFORMANCE WITHOUT EXCESSIVELY COMPROMISING POWER CONSUMPTION. HOWEVER, THERE ARE MANY CHALLENGES THAT ARE CURRENTLY FACING. WE PROPOSE TO ADDRESS SOME OF THEM AT SYSTEM SOFTWARE, APPLICATION SOFTWAR...) |
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| Property / summary | |||||||||||||||
THIS PROJECT ADDRESSES SOME OF THE CHALLENGES POSED BY HIGH PERFORMANCE ARCHITECTURES (MULTINUCLEO, MANYCORE, GPU AND CLOUD COMPUTING). THESE ARCHITECTURES WILL BE OF COMMON USE IN THE MEDIUM TERM, BECAUSE IT IS THE ONLY WAY TO CONTINUE TO INCREASE PERFORMANCE WITHOUT EXCESSIVELY COMPROMISING POWER CONSUMPTION. HOWEVER, THERE ARE MANY CHALLENGES THAT ARE CURRENTLY FACING. WE PROPOSE TO ADDRESS SOME OF THEM AT SYSTEM SOFTWARE, APPLICATION SOFTWARE AND HARDWARE LEVEL. THE OBJECTIVES HAVE BEEN GROUPED INTO THREE LINES: Analysis, MODELATED AND OPTIMISATION OF THE RESOURCES OF THE ARCHITECTURE, DEVELOPMENT OF NEW TECHNICAL TECHNICAL SYSTEMS TO PROVIDED FORMATION OF ARCHITECTURE RESOURCES, and NUMERIC co-processors for heterogeneous manycore systems and implementation of manycore systems in FPGA._x000D_ in the SOFTWARE LEVEL of the system, the tools and techniques available in the environment of Analyses, modelling and the optimisation of the remuneration present a great number of better possibilities, related to the adaptation to manycore ARCHITECTURES and the INCORPORATION OF NEW FORMETERS TO MODEL: (1) CONSIDERATION OF ENERGETIC EFICIENCE as a means of modifying and operationalising, (2) new solutions to the proposals of the modelling and improvement of the special demand for consideration of the improvement of the availability of access to MEMORIA, on the BALANCE OF COMPUTATIONAL CARE AND THE IMPROVEMENT OF ENERGETIC ENVIRONMENT, (3) SALABILITY OF SOLUTIONS TO MANYCORE SYSTEMS._x000D_ IN THE ENVIRONMENT OF THE SOFTWARE OF APPLICATIONS, we will focus on two groups of applications that require a number of competitive revenues: IMAGE PROCESSING AND SIMULATION OF SEMICONDUCTOR DEVICES. A COMMON GOAL FOR ALL TECHNIQUES DEVELOPED FOR IMAGE PROCESSING IS THE EXECUTION WITH A HIGH RESPONSE SPEED OR IN REAL TIME, AS IT IS CRITICAL FOR THE APPLICATIONS CONSIDERED IN THE FIELDS OF ARTIFICIAL VISION, MEDICAL IMAGE TREATMENT, LAND PROCESSING AND MARINE RESCUE. THE IMAGES ON WHICH YOU WILL WORK WILL BE PANCHROMATIC, 2D, 3D, MULTISPECTRAL AND HYPERSPECTRAL IMAGES. ON THE OTHER HAND, THE DEVELOPMENT OF MODELS FOR SEMICONDUCTOR DEVICES THAT CAN BE EFFICIENTLY IMPLEMENTED ON ADVANCED ARCHITECTURES, IS FUNDAMENTAL TO BE ABLE TO CARRY OUT REALISTIC STATISTICAL STUDIES THAT ALLOW PREDICTING THAT DESIGN WOULD BE THE MOST SUITABLE FOR EACH APPLICATION AND WHICH ARE THE LEAST SENSITIVE TO MATERIAL VARIATIONS. OPTIMISED TOOLS WILL BE DEVELOPED FOR MANYCORE ARCHITECTURES THAT ALLOW YOU TO EXECUTE SIMULATIONS AND THEN COLLECT AND PROCESS THE OBTAINED RESULTS AS AUTOMATICALLY AS POSSIBLE. _x000D_ in HARDWARE’s environment, the heterogenous ARCHITECTURE DESIGN AND THE DESIGN of NUMERICAL co-processors is planned. THE OPTIMISATION OF ARTIFICIAL VISION APPLICATIONS REQUIRES THE DEVELOPMENT OF HETEROGENEOUS ARCHITECTURES. THE AVAILABILITY OF FPGAS THAT INTEGRATE GENERAL PURPOSE PROCESSORS WITH PROGRAMMABLE LOGIC ON THE SAME CHIP, WILL ALLOW YOU TO OBTAIN A CONFIGURABLE HETEROGENOUS MANYCORE SYSTEM. ON THE OTHER HAND, THE DESIGN OF MODULES THAT CAN BE INCORPORATED AS NUMERIC COPROCESSORS IN MANYCORE SYSTEMS WILL BE ADDRESSED. WE WILL FOCUS ON THE FIELD OF ARITHMETIC DECIMAL AND BINARY FLOATING POINT. THESE COPROCESSORS WILL IMPLEMENT FUNCTIONS NOT COMMONLY AVAILABLE IN HARDWARE IN GENERAL PURPOSE PROCESSORS. (English) | |||||||||||||||
| Property / summary: THIS PROJECT ADDRESSES SOME OF THE CHALLENGES POSED BY HIGH PERFORMANCE ARCHITECTURES (MULTINUCLEO, MANYCORE, GPU AND CLOUD COMPUTING). THESE ARCHITECTURES WILL BE OF COMMON USE IN THE MEDIUM TERM, BECAUSE IT IS THE ONLY WAY TO CONTINUE TO INCREASE PERFORMANCE WITHOUT EXCESSIVELY COMPROMISING POWER CONSUMPTION. HOWEVER, THERE ARE MANY CHALLENGES THAT ARE CURRENTLY FACING. WE PROPOSE TO ADDRESS SOME OF THEM AT SYSTEM SOFTWARE, APPLICATION SOFTWARE AND HARDWARE LEVEL. THE OBJECTIVES HAVE BEEN GROUPED INTO THREE LINES: Analysis, MODELATED AND OPTIMISATION OF THE RESOURCES OF THE ARCHITECTURE, DEVELOPMENT OF NEW TECHNICAL TECHNICAL SYSTEMS TO PROVIDED FORMATION OF ARCHITECTURE RESOURCES, and NUMERIC co-processors for heterogeneous manycore systems and implementation of manycore systems in FPGA._x000D_ in the SOFTWARE LEVEL of the system, the tools and techniques available in the environment of Analyses, modelling and the optimisation of the remuneration present a great number of better possibilities, related to the adaptation to manycore ARCHITECTURES and the INCORPORATION OF NEW FORMETERS TO MODEL: (1) CONSIDERATION OF ENERGETIC EFICIENCE as a means of modifying and operationalising, (2) new solutions to the proposals of the modelling and improvement of the special demand for consideration of the improvement of the availability of access to MEMORIA, on the BALANCE OF COMPUTATIONAL CARE AND THE IMPROVEMENT OF ENERGETIC ENVIRONMENT, (3) SALABILITY OF SOLUTIONS TO MANYCORE SYSTEMS._x000D_ IN THE ENVIRONMENT OF THE SOFTWARE OF APPLICATIONS, we will focus on two groups of applications that require a number of competitive revenues: IMAGE PROCESSING AND SIMULATION OF SEMICONDUCTOR DEVICES. A COMMON GOAL FOR ALL TECHNIQUES DEVELOPED FOR IMAGE PROCESSING IS THE EXECUTION WITH A HIGH RESPONSE SPEED OR IN REAL TIME, AS IT IS CRITICAL FOR THE APPLICATIONS CONSIDERED IN THE FIELDS OF ARTIFICIAL VISION, MEDICAL IMAGE TREATMENT, LAND PROCESSING AND MARINE RESCUE. THE IMAGES ON WHICH YOU WILL WORK WILL BE PANCHROMATIC, 2D, 3D, MULTISPECTRAL AND HYPERSPECTRAL IMAGES. ON THE OTHER HAND, THE DEVELOPMENT OF MODELS FOR SEMICONDUCTOR DEVICES THAT CAN BE EFFICIENTLY IMPLEMENTED ON ADVANCED ARCHITECTURES, IS FUNDAMENTAL TO BE ABLE TO CARRY OUT REALISTIC STATISTICAL STUDIES THAT ALLOW PREDICTING THAT DESIGN WOULD BE THE MOST SUITABLE FOR EACH APPLICATION AND WHICH ARE THE LEAST SENSITIVE TO MATERIAL VARIATIONS. OPTIMISED TOOLS WILL BE DEVELOPED FOR MANYCORE ARCHITECTURES THAT ALLOW YOU TO EXECUTE SIMULATIONS AND THEN COLLECT AND PROCESS THE OBTAINED RESULTS AS AUTOMATICALLY AS POSSIBLE. _x000D_ in HARDWARE’s environment, the heterogenous ARCHITECTURE DESIGN AND THE DESIGN of NUMERICAL co-processors is planned. THE OPTIMISATION OF ARTIFICIAL VISION APPLICATIONS REQUIRES THE DEVELOPMENT OF HETEROGENEOUS ARCHITECTURES. THE AVAILABILITY OF FPGAS THAT INTEGRATE GENERAL PURPOSE PROCESSORS WITH PROGRAMMABLE LOGIC ON THE SAME CHIP, WILL ALLOW YOU TO OBTAIN A CONFIGURABLE HETEROGENOUS MANYCORE SYSTEM. ON THE OTHER HAND, THE DESIGN OF MODULES THAT CAN BE INCORPORATED AS NUMERIC COPROCESSORS IN MANYCORE SYSTEMS WILL BE ADDRESSED. WE WILL FOCUS ON THE FIELD OF ARITHMETIC DECIMAL AND BINARY FLOATING POINT. THESE COPROCESSORS WILL IMPLEMENT FUNCTIONS NOT COMMONLY AVAILABLE IN HARDWARE IN GENERAL PURPOSE PROCESSORS. (English) / rank | |||||||||||||||
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| Property / summary: THIS PROJECT ADDRESSES SOME OF THE CHALLENGES POSED BY HIGH PERFORMANCE ARCHITECTURES (MULTINUCLEO, MANYCORE, GPU AND CLOUD COMPUTING). THESE ARCHITECTURES WILL BE OF COMMON USE IN THE MEDIUM TERM, BECAUSE IT IS THE ONLY WAY TO CONTINUE TO INCREASE PERFORMANCE WITHOUT EXCESSIVELY COMPROMISING POWER CONSUMPTION. HOWEVER, THERE ARE MANY CHALLENGES THAT ARE CURRENTLY FACING. WE PROPOSE TO ADDRESS SOME OF THEM AT SYSTEM SOFTWARE, APPLICATION SOFTWARE AND HARDWARE LEVEL. THE OBJECTIVES HAVE BEEN GROUPED INTO THREE LINES: Analysis, MODELATED AND OPTIMISATION OF THE RESOURCES OF THE ARCHITECTURE, DEVELOPMENT OF NEW TECHNICAL TECHNICAL SYSTEMS TO PROVIDED FORMATION OF ARCHITECTURE RESOURCES, and NUMERIC co-processors for heterogeneous manycore systems and implementation of manycore systems in FPGA._x000D_ in the SOFTWARE LEVEL of the system, the tools and techniques available in the environment of Analyses, modelling and the optimisation of the remuneration present a great number of better possibilities, related to the adaptation to manycore ARCHITECTURES and the INCORPORATION OF NEW FORMETERS TO MODEL: (1) CONSIDERATION OF ENERGETIC EFICIENCE as a means of modifying and operationalising, (2) new solutions to the proposals of the modelling and improvement of the special demand for consideration of the improvement of the availability of access to MEMORIA, on the BALANCE OF COMPUTATIONAL CARE AND THE IMPROVEMENT OF ENERGETIC ENVIRONMENT, (3) SALABILITY OF SOLUTIONS TO MANYCORE SYSTEMS._x000D_ IN THE ENVIRONMENT OF THE SOFTWARE OF APPLICATIONS, we will focus on two groups of applications that require a number of competitive revenues: IMAGE PROCESSING AND SIMULATION OF SEMICONDUCTOR DEVICES. A COMMON GOAL FOR ALL TECHNIQUES DEVELOPED FOR IMAGE PROCESSING IS THE EXECUTION WITH A HIGH RESPONSE SPEED OR IN REAL TIME, AS IT IS CRITICAL FOR THE APPLICATIONS CONSIDERED IN THE FIELDS OF ARTIFICIAL VISION, MEDICAL IMAGE TREATMENT, LAND PROCESSING AND MARINE RESCUE. THE IMAGES ON WHICH YOU WILL WORK WILL BE PANCHROMATIC, 2D, 3D, MULTISPECTRAL AND HYPERSPECTRAL IMAGES. ON THE OTHER HAND, THE DEVELOPMENT OF MODELS FOR SEMICONDUCTOR DEVICES THAT CAN BE EFFICIENTLY IMPLEMENTED ON ADVANCED ARCHITECTURES, IS FUNDAMENTAL TO BE ABLE TO CARRY OUT REALISTIC STATISTICAL STUDIES THAT ALLOW PREDICTING THAT DESIGN WOULD BE THE MOST SUITABLE FOR EACH APPLICATION AND WHICH ARE THE LEAST SENSITIVE TO MATERIAL VARIATIONS. OPTIMISED TOOLS WILL BE DEVELOPED FOR MANYCORE ARCHITECTURES THAT ALLOW YOU TO EXECUTE SIMULATIONS AND THEN COLLECT AND PROCESS THE OBTAINED RESULTS AS AUTOMATICALLY AS POSSIBLE. _x000D_ in HARDWARE’s environment, the heterogenous ARCHITECTURE DESIGN AND THE DESIGN of NUMERICAL co-processors is planned. THE OPTIMISATION OF ARTIFICIAL VISION APPLICATIONS REQUIRES THE DEVELOPMENT OF HETEROGENEOUS ARCHITECTURES. THE AVAILABILITY OF FPGAS THAT INTEGRATE GENERAL PURPOSE PROCESSORS WITH PROGRAMMABLE LOGIC ON THE SAME CHIP, WILL ALLOW YOU TO OBTAIN A CONFIGURABLE HETEROGENOUS MANYCORE SYSTEM. ON THE OTHER HAND, THE DESIGN OF MODULES THAT CAN BE INCORPORATED AS NUMERIC COPROCESSORS IN MANYCORE SYSTEMS WILL BE ADDRESSED. WE WILL FOCUS ON THE FIELD OF ARITHMETIC DECIMAL AND BINARY FLOATING POINT. THESE COPROCESSORS WILL IMPLEMENT FUNCTIONS NOT COMMONLY AVAILABLE IN HARDWARE IN GENERAL PURPOSE PROCESSORS. (English) / qualifier | |||||||||||||||
point in time: 13 October 2021
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Revision as of 23:08, 12 October 2021
Project Q3187457 in Spain
| Language | Label | Description | Also known as |
|---|---|---|---|
| English | HARDWARE AND SOFTWARE SOLUTIONS FOR HIGH PERFORMANCE COMPUTING |
Project Q3187457 in Spain |
Statements
14,735,380.0 Euro
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18,419,225.0 Euro
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80.0 percent
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1 January 2014
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31 December 2017
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UNIVERSIDAD DE SANTIAGO DE COMPOSTELA
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42°52'49.51"N, 8°32'45.10"W
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15078
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EN ESTE PROYECTO SE ABORDAN ALGUNOS DE LOS RETOS QUE TIENEN PLANTEADAS LAS ARQUITECTURAS DE ALTAS PRESTACIONES (MULTINUCLEO, MANYCORE, GPU Y COMPUTACION CLOUD). ESTAS ARQUITECTURAS SERAN DE USO COMUN A MEDIO PLAZO, PORQUE ES LA UNICA FORMA DE SEGUIR AUMENTANDO LAS PRESTACIONES SIN COMPROMETER EXCESIVAMENTE EL CONSUMO DE POTENCIA. SIN EMBARGO, SON MUCHOS LOS RETOS QUE ACTUALMENTE ESTAN PLANTEADOS. PROPONEMOS ABORDAR ALGUNOS DE ELLOS A NIVEL DE SOFTWARE DEL SISTEMA, SOFTWARE DE APLICACIONES Y HARDWARE. LOS OBJETIVOS SE HAN AGRUPADO EN TRES LINEAS: ANALISIS, MODELADO Y OPTIMIZACION DEL RENDIMIENTO, DESARROLLO DE NUEVAS TECNICAS QUE APROVECHEN DE FORMA EFICIENTE LOS RECURSOS DE LA ARQUITECTURA, Y COPROCESADORES NUMERICOS PARA SISTEMAS MANYCORE HETEROGENEOS E IMPLEMENTACION DE SISTEMAS MANYCORE EN FPGA._x000D_ EN EL NIVEL DE SOFTWARE DEL SISTEMA, LAS HERRAMIENTAS Y TECNICAS DISPONIBLES EN EL AMBITO DEL ANALISIS, MODELADO Y LA OPTIMIZACION DEL RENDIMIENTO PRESENTAN UN GRAN NUMERO DE POSIBILIDADES DE MEJORA, RELACIONADOS CON LA ADAPTACION A ARQUITECTURAS MANYCORE Y LA INCORPORACION DE NUEVOS PARAMETROS A MODELAR: (1) CONSIDERACION DE LA EFICIENCIA ENERGETICA COMO PARAMETRO DE RENDIMIENTO A MODELAR Y OPTIMIZAR, (2) NUEVAS SOLUCIONES A LOS PROBLEMAS DEL MODELADO Y MEJORA DEL RENDIMIENTO PRESTANDO ESPECIAL ATENCION A LA MEJORA DE LA LOCALIDAD DE LOS ACCESOS A MEMORIA, AL BALANCEO DE LA CARGA COMPUTACIONAL Y A LA MEJORA DEL RENDIMIENTO ENERGETICO, (3) ESCALABILIDAD DE LAS SOLUCIONES A SISTEMAS MANYCORE._x000D_ EN EL AMBITO DEL SOFTWARE DE APLICACIONES, NOS CENTRAREMOS EN DOS GRUPOS DE APLICACIONES QUE REQUIEREN UN ELEVADO NUMERO DE RECURSOS COMPUTACIONALES: PROCESADO DE IMAGENES Y SIMULACION DE DISPOSITIVOS SEMICONDUCTORES. UN OBJETIVO COMUN A TODAS LAS TECNICAS QUE SE DESARROLLARAN PARA EL PROCESADO DE IMAGEN ES LA EJECUCION CON UNA ALTA VELOCIDAD DE RESPUESTA O EN TIEMPO REAL, YA QUE RESULTA CRITICO PARA LAS APLICACIONES CONSIDERADAS EN LOS AMBITOS DE VISION ARTIFICIAL, TRATAMIENTO DE IMAGEN MEDICA, PROCESADO DE TERRENOS Y SALVAMENTO MARITIMO. LAS IMAGENES SOBRE LAS QUE SE TRABAJARA SERAN IMAGENES PANCROMATICAS, 2D, 3D, MULTIESPECTRALES E HIPERESPECTRALES. POR OTRA PARTE, EL DESARROLLO DE MODELOS PARA DISPOSITIVOS SEMICONDUCTORES QUE PUEDAN SER IMPLEMENTADOS EFICIENTEMENTE SOBRE ARQUITECTURAS AVANZADAS, ES FUNDAMENTAL PARA PODER REALIZAR ESTUDIOS ESTADISTICOS REALISTAS QUE PERMITAN PREDECIR QUE DISEÑO SERIA EL MAS ADECUADO PARA CADA APLICACION Y CUALES SON LOS MENOS SENSIBLES A LAS VARIACIONES MATERIALES. SE DESARROLLARAN HERRAMIENTAS OPTIMIZADAS PARA ARQUITECTURAS MANYCORE QUE PERMITAN EJECUTAR LAS SIMULACIONES Y POSTERIORMENTE RECOPILAR Y PROCESAR LOS RESULTADOS OBTENIDOS DE FORMA LO MAS AUTOMATICA POSIBLE. _x000D_ EN EL AMBITO DEL HARDWARE, SE PLANTEA ABORDAR EL DISEÑO DE ARQUITECTURAS HETEROGENEAS Y EL DISEÑO DE COPROCESADORES NUMERICOS. LA OPTIMIZACION DE APLICACIONES DE VISION ARTIFICIAL REQUIERE EL DESARROLLO DE ARQUITECTURAS HETEROGENEAS. LA DISPONIBILIDAD DE FPGAS QUE INTEGRAN PROCESADORES DE PROPOSITO GENERAL CON LOGICA PROGRAMABLE EN EL MISMO CHIP, PERMITIRA OBTENER UN SISTEMA CONFIGURABLE MANYCORE HETEROGENEO. POR OTRA PARTE, SE ABORDARA EL DISEÑO DE MODULOS QUE PUEDAN SER INCORPORADOS COMO COPROCESADORES NUMERICOS EN SISTEMAS MANYCORE. NOS CENTRAREMOS EN EL CAMPO DE LA ARITMETICA PUNTO FLOTANTE DECIMAL Y BINARIA. ESTOS COPROCESADORES IMPLEMENTARAN FUNCIONES NO DISPONIBLES HABITUALMENTE EN HARDWARE EN LOS PROCESADORES DE PROPOSITO GENERAL. (Spanish)
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THIS PROJECT ADDRESSES SOME OF THE CHALLENGES POSED BY HIGH PERFORMANCE ARCHITECTURES (MULTINUCLEO, MANYCORE, GPU AND CLOUD COMPUTING). THESE ARCHITECTURES WILL BE OF COMMON USE IN THE MEDIUM TERM, BECAUSE IT IS THE ONLY WAY TO CONTINUE TO INCREASE PERFORMANCE WITHOUT EXCESSIVELY COMPROMISING POWER CONSUMPTION. HOWEVER, THERE ARE MANY CHALLENGES THAT ARE CURRENTLY FACING. WE PROPOSE TO ADDRESS SOME OF THEM AT SYSTEM SOFTWARE, APPLICATION SOFTWARE AND HARDWARE LEVEL. THE OBJECTIVES HAVE BEEN GROUPED INTO THREE LINES: Analysis, MODELATED AND OPTIMISATION OF THE RESOURCES OF THE ARCHITECTURE, DEVELOPMENT OF NEW TECHNICAL TECHNICAL SYSTEMS TO PROVIDED FORMATION OF ARCHITECTURE RESOURCES, and NUMERIC co-processors for heterogeneous manycore systems and implementation of manycore systems in FPGA._x000D_ in the SOFTWARE LEVEL of the system, the tools and techniques available in the environment of Analyses, modelling and the optimisation of the remuneration present a great number of better possibilities, related to the adaptation to manycore ARCHITECTURES and the INCORPORATION OF NEW FORMETERS TO MODEL: (1) CONSIDERATION OF ENERGETIC EFICIENCE as a means of modifying and operationalising, (2) new solutions to the proposals of the modelling and improvement of the special demand for consideration of the improvement of the availability of access to MEMORIA, on the BALANCE OF COMPUTATIONAL CARE AND THE IMPROVEMENT OF ENERGETIC ENVIRONMENT, (3) SALABILITY OF SOLUTIONS TO MANYCORE SYSTEMS._x000D_ IN THE ENVIRONMENT OF THE SOFTWARE OF APPLICATIONS, we will focus on two groups of applications that require a number of competitive revenues: IMAGE PROCESSING AND SIMULATION OF SEMICONDUCTOR DEVICES. A COMMON GOAL FOR ALL TECHNIQUES DEVELOPED FOR IMAGE PROCESSING IS THE EXECUTION WITH A HIGH RESPONSE SPEED OR IN REAL TIME, AS IT IS CRITICAL FOR THE APPLICATIONS CONSIDERED IN THE FIELDS OF ARTIFICIAL VISION, MEDICAL IMAGE TREATMENT, LAND PROCESSING AND MARINE RESCUE. THE IMAGES ON WHICH YOU WILL WORK WILL BE PANCHROMATIC, 2D, 3D, MULTISPECTRAL AND HYPERSPECTRAL IMAGES. ON THE OTHER HAND, THE DEVELOPMENT OF MODELS FOR SEMICONDUCTOR DEVICES THAT CAN BE EFFICIENTLY IMPLEMENTED ON ADVANCED ARCHITECTURES, IS FUNDAMENTAL TO BE ABLE TO CARRY OUT REALISTIC STATISTICAL STUDIES THAT ALLOW PREDICTING THAT DESIGN WOULD BE THE MOST SUITABLE FOR EACH APPLICATION AND WHICH ARE THE LEAST SENSITIVE TO MATERIAL VARIATIONS. OPTIMISED TOOLS WILL BE DEVELOPED FOR MANYCORE ARCHITECTURES THAT ALLOW YOU TO EXECUTE SIMULATIONS AND THEN COLLECT AND PROCESS THE OBTAINED RESULTS AS AUTOMATICALLY AS POSSIBLE. _x000D_ in HARDWARE’s environment, the heterogenous ARCHITECTURE DESIGN AND THE DESIGN of NUMERICAL co-processors is planned. THE OPTIMISATION OF ARTIFICIAL VISION APPLICATIONS REQUIRES THE DEVELOPMENT OF HETEROGENEOUS ARCHITECTURES. THE AVAILABILITY OF FPGAS THAT INTEGRATE GENERAL PURPOSE PROCESSORS WITH PROGRAMMABLE LOGIC ON THE SAME CHIP, WILL ALLOW YOU TO OBTAIN A CONFIGURABLE HETEROGENOUS MANYCORE SYSTEM. ON THE OTHER HAND, THE DESIGN OF MODULES THAT CAN BE INCORPORATED AS NUMERIC COPROCESSORS IN MANYCORE SYSTEMS WILL BE ADDRESSED. WE WILL FOCUS ON THE FIELD OF ARITHMETIC DECIMAL AND BINARY FLOATING POINT. THESE COPROCESSORS WILL IMPLEMENT FUNCTIONS NOT COMMONLY AVAILABLE IN HARDWARE IN GENERAL PURPOSE PROCESSORS. (English)
13 October 2021
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Santiago de Compostela
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Identifiers
TIN2013-41129-P
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